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Job Title: APJC - Hardware Engineer
Company: Cisco
Location: Bangalore
Website: www.cisco.com
Eligibility: BSEE is required/MSEE
Click to assess yourself on the required skill before applying!
Skills: Verilog HDL, C, and C++
Experience: Freshers
Job Summary: Skills:
•Hardware design, the test/verification environment is designed using an object-oriented framework designed in C++ so you will use knowledge from your programming courses that include advance data structures, algorithms, and design patterns as well as languages such as Verilog HDL, C, and C++.
•You will aid in the architecture of the test environments which include developing constrained random stimulus generators, automated response checkers, and advanced configuration and programming API components.
•Some of these components are reused across the entire phase of the project from module, chip and system level verification on Linux based verilog simulators.
•Problem solving skills and out-of-the-box thinking to create area and power efficient hardware designs as well as reusable C++ classes for the verification and simulation environments.
•Writing thorough and detailed specifications and test plans as well as oral descriptions will enable your ideas and concepts to be reviewed and accepted by other team members.
•BSEE is required/MSEE is preferred.
•Team-player, can-do attitude will work well in a group environment while still being able to contribute on an individual basis and you will find that you'll have lots of fun and thrive in this environment if you enjoy being challenged, learning new ideas, and push yourself to achieve aggressive technology goals.
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Contact: Click Here To Apply
Posted Date: Jul 06, 2013

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